The current Rust visibility-graph router compared with the retired grid router. This is the engineering note; the marketing-oriented product page is Placer/Router Engine.
| Feature | V1 Grid Router | Current Rust VG Router |
|---|---|---|
| Obstacle Model | Grid (0.1mm cells, flat arrays) | Continuous axis-aligned rectangles, rstar R-tree |
| Pathfinding | Grid A* (Manhattan neighbors) | Visibility Graph 3D product graph, A* on layer and via edges |
| Crossing Prevention | Override net_excluded overrides trace_blocked | By Construction routed traces become obstacles |
| Per-Net Obstacles | Partial blanket override for component bodies | Full filter by net name, own-net obstacles excluded |
| BGA Escape | Good via-in-pad, graph 2-coloring | Current escape reservations, row-aware endpoint access, diff pair awareness |
| Rip-Up | Basic top-1 blocker, no history | Transactional ripup, shove, ECO repair, rollback |
| Congestion | VPR pfac 0.5-8.0, history linear | PathFinder congestion negotiation per iteration |
| Multi-Pin Nets | RMST Prim's MST | MST decompose to 2-pin segments |
| Power Vias | Post-routing, Python | Pre-routing plane-backed access planning and targeted GND vias |
| Route Time | 300-400s | Benchmark-backed varies by board and round count |
| Shorts | 199 | DRC-guided KiCad reports drive repair hints |
| Failed Nets | 22 | Closed by pipeline no hand-picked net fixes |
The grid router's is_passable_at() had a fundamental flaw:
when net_excluded[idx] was true (inside a component body),
it returned true unconditionally — even when other nets' traces occupied the cell.
This allowed routes to freely cross inside dense BGA/IC regions, producing 199 shorts.
Making trace_blocked hard caused 38 nets to fail because pins could not escape.
The visibility-graph router operates in continuous space. There is no grid, no cell-based obstacle model, and no net_excluded concept. Obstacles are axis-aligned rectangles with explicit net ownership. When routing net A, only obstacles belonging to other nets block the path. Routed traces immediately become new obstacles, preventing crossings by construction. The rstar R-tree provides O(log n) spatial queries for obstacle intersection tests.
V2's BGA fanout uses classify_net to identify
differential pairs, power nets, and single-ended signals. Cumulative stagger offsets ensure
each escape route clears the previous one. Differential pairs maintain symmetry through
the entire fanout. This eliminated the 22 failed nets from V1.
Connectivity is clean. The remaining work is reducing the non-connectivity DRC set reported by KiCad after the promoted route.
With shorts and unconnected items resolved, the next layout pass can shrink the outline toward the area actually required by component keepouts and routing channels.
The VG router engine (rstar + std only) is WASM-compatible. A router-wasm crate could power interactive route visualization directly in the browser — add obstacles, route between points, and see the visibility graph in real time.